NSCL Device support.: camac.h Source File

00001 
00015 #ifndef __CAMAC_H
00016 #define __CAMAC_H
00017 
00018 #ifndef __DAQTYPES_H
00019 #include <daqdatatypes.h>
00020 #endif
00021 
00022 /*----------------------------------------------------------------------
00023  *
00024  * At compile time, the base macros that access the camac system are
00025  * selected by defining one of CESCAMAC or VC32CAMAC below.
00026  * These provide base camac access, and device specific macros
00027  */
00028 
00029 #ifdef CESCAMAC
00030 #include <cescamac.h>
00031 #else
00032 #ifdef  VC32CAMAC
00033 #include <wienercamac.h>
00034 #endif
00035 #endif
00036 
00037 #ifndef CBDPTR                      /* Macro defined by *camac.h */
00038 
00039 #error "You must select a supported value for the CAMAC INTERFACE macro"
00040 
00041 #endif
00042 
00043 /*---------------------------------------------------------------------------
00044  *  these macros/functions, are all independent of the camac controller.
00045  */
00046 
00047 
00048 extern bool daq_isJumboBuffer();
00049 
00050 /*
00051 ** Need to define getlong and putlong to support the 24 bit operations.
00052 ** these are written in an endian independent way as long as you refer to
00053 ** VME address space.
00054 */
00055 
00056 static inline long getlong(volatile void* a) {
00057   UINT16* p = (UINT16*)a;
00058   long    l = p[0];
00059   l   = l << 16;
00060   l  |= p[1];
00061   return l;
00062 }
00063 
00064 static inline void putlong(INT32 v,volatile void *a)
00065 {                                      
00066   volatile short* p = (volatile short*)a;
00067   *p = (v >> 16) & 0xff;                 
00068   p++;                                   
00069   *p = (v & 0xffff);                     
00070 }
00071 
00072 
00073 #define putbufw(word)           (*bufpt = (INT16)(word)); ++bufpt
00074 #define putbufl(l)              {                                       \
00075                                   UINT32 tmp = (l);                         \
00076                                   putbufw((tmp&0xffff));                  \
00077                                   putbufw((tmp >> 16));                   \
00078                                 }
00079 
00080 #define savebufpt(var)          var = (INT32)bufpt
00081 #define rstbufpt(var)           bufpt = ((INT16 *)var)
00082 
00083     /* Bitwise operators. */
00084 
00085 #define IAND(a,b)       ((a) & (b))
00086 #define IOR(a, b)       ((a) | (b))
00087 #define ISHIFT(a, b)    ((a) << (b))
00088 
00089     /* Boolean operators */
00090 
00091 #define EQ      ==
00092 #define NE      !=
00093 #define GT      >
00094 #define GE      >=
00095 #define LT      <
00096 #define LE      <=
00097 #define AND     &&
00098 #define OR      ||
00099 #define NOT     !
00100 #ifndef TRUE
00101 #define TRUE    1
00102 #endif
00103 #ifndef FALSE
00104 #define FALSE   0
00105 #endif
00106 
00107 
00108     /* Flow of control */
00109 
00110 #define IF      if
00111 #define THEN    {
00112 #define ELSE    } else {
00113 #define ENDIF   }
00114 #define DO
00115 #define WHILE(expr) while(expr) {
00116 #define ENDDO   }
00117 #define CALL    
00118 #ifdef __unix__
00119 #else
00120 #define sleep(sec)              pause_p((int)((sec)*second))
00121 #endif
00122     /* Declarations */
00123 
00124 #define LOGICAL UINT32
00125 #define WORD    INT16
00126 #define INTEGER INT32
00127 #define REAL    float
00128 
00129     /* code fragment generators: */
00130 
00131 
00132 #define qstoptobuf(b,c,n,a,f) do {                              \
00133                                 putbufw(camread16(b,c,n,a,f));  \
00134                               } while(qtst(b));                 \
00135                               --bufpt;
00136 
00137 #define rdtobuf16(b, c, n, a, f)  putbufw(camread16((b),(c),(n),(a),(f)))
00138 #define rdtobuf24(b, c, n, a, f)  putbufl(camread24((b),(c),(n),(a),(f)))
00139 
00140 
00141 #define READBIT(b, c, n, a, f, d) d = camread16(b,c,n,a,f);                 \
00142                                   putbufw(d)
00143     /* Device specific macros */
00144 
00145         /* ORTEC AD811's */
00146 
00147 #define INIT811(b, c, n)        camctl((b),(c),(n),12,11); \
00148                                 camctl((b),(c),(n),12,26)
00149 #define CLR811(b, c, n)         camctl((b),(c),(n),12,11)
00150 #define READ811(b, c, n, a)     rdtobuf16((b),(c),(n),(a),0)
00151 
00152         /* LRS 22xx series devices */
00153 
00154 #define INIT22XX(b, c, n)       camctl((b),(c),(n),0,9); \
00155                                 camctl((b),(c),(n),0,26)
00156 #define CLR22XX(b, c, n)        camctl((b),(c),(n),0,9)
00157 #define READ22XX(b, c, n, a)    rdtobuf16((b),(c),(n),(a),0)
00158 
00159         /* LRS feras. */
00160 
00161 #define FERA_OFS        0x8000
00162 #define FERA_CLE        0x4000
00163 #define FERA_CSR        0x2000
00164 #define FERA_CCE        0x1000
00165 #define FERA_CPS        0x0800
00166 #define FERA_EEN        0x0400
00167 #define FERA_ECE        0x0200
00168 #define FERA_EPS        0x0100
00169 #define busy(br, cr, sl) {                                                \
00170                         fprintf(stderr,                                   \
00171                                 "Module busy during programming: \n");      \
00172                         fprintf(stderr,                                   \
00173                                  "Br = %d Cr = %d Slot = %d \n",          \
00174                                  (br), (cr), (sl));                       \
00175                         sleep(2);                                 \
00176                         }
00177 #define INITFERA(b, c, n, cmd, ped)     { INT16 _sub;                        \
00178                                           INT32 *_p;                         \
00179                                           do                                 \
00180                                           {                                  \
00181                                            camctl((b),(c),(n),0,9);          \
00182                                            camwrite16((b),(c),(n),0,16,cmd); \
00183                                            if(!qtst(b))                      \
00184                                               busy((b),(c),(n));             \
00185                                           }while (!qtst((b)));               \
00186                                           _p = &userints[ped];               \
00187                                           for(_sub=0;_sub<=15; _p++,_sub++)  \
00188                                             do                               \
00189                                             {                                \
00190                                               camctl((b),(c),(n),0,9);       \
00191                                               camwrite16((b),(c),(n),_sub,   \
00192                                                           17,*_p);           \
00193                                               if(!qtst(b))                   \
00194                                                  busy((b),(c),(n));          \
00195                                             } while(!qtst(b));               \
00196                                         }
00197 #define CLRFERA(b, c, n)        camctl((b),(c),(n),0, 9)
00198 #define READFERA(b, c, n, a)    rdtobuf16((b),(c),(n),(a),2)
00199 #define READFERAALL(b, c, n)    qstoptobuf((b),(c),(n),0,2)
00200 
00201 
00202 /* Ganelec? 812F ADCS: */
00203 
00204 
00205 #define INIT812F(b,c,n, cmd, ped)       { INT16 _sub;                        \
00206                                           INT32 *_p;                         \
00207                                           do                                 \
00208                                           {                                  \
00209                                            camctl((b),(c),(n),0,9);          \
00210                                            camwrite16((b),(c),(n),0,16,cmd); \
00211                                            if(!qtst(b))                      \
00212                                               busy((b),(c),(n));             \
00213                                           }while (!qtst((b)));               \
00214                                           _p = &userints[ped];               \
00215                                           for(_sub=0;_sub<=7; _p++,_sub++)  \
00216                                             do                               \
00217                                             {                                \
00218                                               camctl((b),(c),(n),0,9);       \
00219                                               camwrite16((b),(c),(n),_sub,   \
00220                                                           17,*_p);           \
00221                                               if(!qtst(b))                   \
00222                                                  busy((b),(c),(n));          \
00223                                             } while(!qtst(b));               \
00224                                         }
00225 
00226     /* The definitions below handle Silena ADC's */
00227 
00228 /* initialize Silena 4418 ADC
00229 ** Arguments:
00230 **      int b,c,n       - Branch, crate, slot
00231 **      int cmd         - status register
00232 **      int thrsh       - number of first of 25 users integers 
00233 **                          common threshold x1
00234 **                          lower level discriminator x8
00235 **                          offset x8
00236 **                          upper level discriminator x8
00237 */
00238 #define INIT4418(b,c,n,cmd,thrsh) {                                 \
00239     INT16 i;                                                        \
00240     INT32 *_p;                                                      \
00241     do{                                                             \
00242         camctl(b,c,n,0,9);  /* clear */                             \
00243         camwrite16(b,c,n,14,20,cmd); /* write status word */        \
00244         if(!qtst(b))busy(b,c,n);                                    \
00245     }while(!qtst(b));                                               \
00246     _p =  &userints[thrsh];                                         \
00247     do{                                                             \
00248         camwrite16(b,c,n,9,20,*_p); /* write common threashold */  \
00249         if(!qtst(b))busy(b,c,n);                                    \
00250     }while(!qtst(b));                                               \
00251     ++_p;                                                           \
00252             /* write LLD value */                                   \
00253     for(i=8;i<16;_p++,i++)do{                                       \
00254         camwrite16(b,c,n,i,17,*_p);                                 \
00255         if(!qtst(b))busy(b,c,n);                                    \
00256     }while(!qtst(b));                                               \
00257             /* write offset value */                                \
00258     for(i=0;i<8;_p++,i++)do{                                        \
00259         camwrite16(b,c,n,i,20,*_p);                                 \
00260         if(!qtst(b))busy(b,c,n);                                    \
00261     }while(!qtst(b));                                               \
00262             /* write LLD value */                                   \
00263     for(i=0;i<8;_p++,i++)do{                                        \
00264         camwrite16(b,c,n,i,17,*_p);                                 \
00265         if(!qtst(b))busy(b,c,n);                                    \
00266     }while(!qtst(b));                                               \
00267 }
00268 
00269 /*
00270 ** zero suppressed read.
00271 */
00272 #define READ4418(b,c,n,a) rdtobuf16((b),(c),(n),(a), 2)
00273 #define RDHDR4418(b,c,n)  camread16((b),(c),(n),14, 2)
00274 #define RDPAT4418(b,c,n)  camread16((b),(c),(n),15, 2)
00275 #define BLKREAD4418(b,c,n) qstoptobuf((b),(c),(n),0, 2)
00276 
00277 
00278         /* Generic bit registers
00279                                                     */
00280 
00281 #define INITBIT(b, c, n)        camctl((b),(c),(n),0,11);                     \
00282                                 camctl((b),(c),(n),0,26)
00283 #define CLRBIT(b, c, n)         camctl((b),(c),(n),0,11)
00284 #define RDBIT(b, c, n, a)       rdtobuf16((b),(c),(n),(a),0)
00285 
00286         /* NIM out pattern registers. */
00287 
00288 #define NIMOUT(b, c, n, pattern) camwrite16((b),(c),(n),0,16,pattern)
00289 
00290         /* LRS 4448 scalers. */
00291 
00292 #define ECLSCL_TEST     0x8000
00293 #define ECLSCL_BD       0x2000
00294 #define ECLSCL_RD       0x0080
00295 #define ECLSCL_CL       0x0040
00296 #define ECLSCL_LD       0X0020
00297 #define ECLSCL_NPOS     8
00298 
00299 /* GSI scalers. */
00300 #define INITGSIS(b, c, n)       { camwrite16((b),(c),(n),0,16,0);   \
00301                                   camctl((b),(c),(n),0,9);          \
00302                                   camctl((b),(c),(n),0,1); }
00303 
00304 #define CLRGSIS(b, c, n)        INITGSIS((b),(c),(n))
00305 
00306 
00307 #define READALLGSIS(b, c, n)    { INT16 _a;                         \
00308                                   INITGSIS((b),(c),(n));            \
00309                                   for(_a = 0; _a <=47; _a++) {      \
00310                                       rdtobuf24((b),(c),(n),0,0);   \
00311                                   }                                  \
00312                                 }
00313 
00314 #define INIT4434(b, c, n)       camwrite16((b),(c),(n),0,16, ECLSCL_CL |      \
00315                                                              ECLSCL_BD)
00316 #define CLR4434(b, c, n)        INIT4434((b),(c),(n))
00317 #define READ4434(b, c, n, a)    camwrite16((b),(c),(n),0,16,          \
00318                                                              (ECLSCL_LD) |    \
00319                                                              (a));         \
00320                                           rdtobuf24((b),(c),(n),0,0);
00321 
00322 #define READALL4434(b, c, n)    { INT16 _a;                                   \
00323                                   camwrite16((b),(c),(n),0,16,                \
00324                                                              (ECLSCL_LD)  |  \
00325                                                       (31 << ECLSCL_NPOS));   \
00326                                  for(_a = 31; _a != -1; _a--)                 \
00327                                  {                                          \
00328                                    putbufl(                                   \
00329                                            camread24((b),(c),(n),0,2));       \
00330                                  }                                            \
00331                                 }
00332 
00333         /* LRS 2551 scalers. */
00334 
00335 #define INIT2551(b, c, n)       camctl((b),(c),(n),0,9)
00336 #define CLR2551(b, c, n)        INIT2551((b),(c),(n))
00337 #define READ2551(b, c, n, a)    putbufl(                                     \
00338                                 camread24((b),(c),(n),(a),0))
00339 
00340 #define READALL2551(b, c, n)    { INT16 _a;                                   \
00341                                   for(_a = 0; _a < 12; _a++)                  \
00342                                        putbufl(                               \
00343                                         camread24((b),(c),(n),(_a), 0));              \
00344                                 }
00345 
00346 /*
00347 ** Handle phillips adc/qdc/tdc:
00348 */
00349 /*   For the 7164 ADCs:
00350 *     cmd      is the control register
00351 *              bits 1,2,3 are ped, lower thrsh, upper thrsh enable
00352 *              bits 9-16 are conversion delay
00353 *     ped      is the first of 16 integers for pedestals */
00354 #define INIT7164(b,c,n,cmd,ped) {                        \
00355     INT16 i;                                         \
00356     INT32 *_p;                                       \
00357     camctl(b,c,n,0,9);               /* clear */     \
00358     do{                                          \
00359           camwrite16(b,c,n,0,19,cmd);                    \
00360           if(!qtst(b))busy(b,c,n);                       \
00361           }while(!qtst(b));                                \
00362           _p = &userints[ped];                             \
00363           for(i=0;i<16;_p++,i++)do{                        \
00364               camwrite16(b,c,n,0,17,i); /* ped to follow*/ \
00365             camwrite16(b,c,n,i,20,*_p); /* here it is */ \
00366             if(!qtst(b))busy(b,c,n);                     \
00367               }while(!qtst(b));                              \
00368         camctl(b,c,n,0,26);                              \
00369 }
00370 #define INIT7186(b,c,n,ip,ilow,iup,ped){                 \
00371         INT16 i,ibit,icmd=0;                             \
00372         INT32 *_p;                                       \
00373         camctl(b,c,n,0,9);              /* clear */      \
00374         if(ip)icmd |= 1;     /* set pedestals */         \
00375         if(ilow)icmd |= 2;   /* set lower thresh */      \
00376         if(iup)icmd |= 4;    /* set upper thresh */      \
00377         camwrite16(b,c,n,0,19,icmd);                     \
00378         _p = &userints[ped];                             \
00379         for(ibit=0;ibit<3; ibit++){ /* ped, low, upper */ \
00380           if((1 < ibit) & icmd){                         \
00381             camwrite16(b,c,n,ibit,17,0);                 \
00382             for(i=0; i<16; _p++,i++)do{                  \
00383               camwrite16(b,c,n,i,20,*_p);                \
00384               if(!qtst(b))busy(b,c,n);                   \
00385             }while(!qtst(b));                            \
00386           }                                              \
00387         }                                                \
00388         camctl(b,c,n,0,26);    /* enable LAM */          \
00389 }       
00390 /*   Reads and clears are straightforward 
00391  * bits 12-16 contain the address, which we don't want
00392  * I don't know what a LONGBRANCH is, so I'll
00393  * follow what precedes this */
00394 #define READ7164(b,c,n,a)  putbufw(camread16((b),(c),(n),(a),0) & 0x0fff)
00395 #define READ7186(b,c,n,a)  putbufw(camread16((b),(c),(n),(a),0))
00396 #define CLR7164(b,c,n) camctl((b),(c),(n),0,9)
00397 
00398 
00399         /* Initialize the triggers; */
00400         /* User trigger 1 is done by a */
00401 
00402 #define STARTUSR1TRIG(frequency)        trig1init((frequency))
00403 #define STOPUSR1TRIG                    trig1kill
00404 
00405         /* I/O macros */
00406 
00407 #define msg(txt)        fprintf (stderr, txt)
00408 #define hexout(val)     fprintf (stderr, "%x", val)
00409 #define decout(val)     fprintf (stderr, "%d", val)
00410 #define newline         fprintf (stderr, "\n")
00411 
00412 
00413 /* Data packetizing macros:
00414 
00415 
00416 /*
00417 ** Macros for building subevent structures:
00418 */
00419 
00420                 /* Fixed size sub event packet. */
00421 
00422 #define Packet(size, type) { if (daq_isJumboBuffer()) {                  \
00423                                 putbufl(size); putbufw(type);            \
00424                              } else {                                    \
00425                                 putbufw(size); putbufw(type);            \
00426                              }
00427 
00428 
00429 #define EndPacket          }
00430 
00431                 /* Variable sized sub event packet */
00432 
00433 #ifdef HP
00434 #define VPacket(type)     {                                            \
00435                             UINT16 *_pktstart = bufpt; ++bufpt;         \
00436                             if (daq_isJumboBuffer()) ++bufpt;           \
00437                             putbufw(type);
00438 
00439 #define EndVPacket           if (daq_isJumboBuffer()) {                      \
00440                                 *((UINT32*)_pktstart) = (bufpt - _pktstart); \
00441                              } else {                                        \
00442                                 *_pktstart = (INT16)(bufpt - _pktstart);     \
00443                              }                                               \
00444                            }
00445 #else
00446 #define VPacket(type)     {                                           \
00447                             DAQWordBufferPtr _pktstart = bufpt;       \
00448                             ++bufpt;                                  \
00449                             if (daq_isJumboBuffer()) ++bufpt;         \
00450                             putbufw(type);
00451 
00452 // Assumption of little endian-ness here:
00453 
00454 #define EndVPacket        if (daq_isJumboBuffer()) {                                     \
00455                                UINT32  __size = bufpt.GetIndex() - _pktstart.GetIndex(); \
00456                                *_pktstart     = (UINT16)(__size & 0xffff);               \
00457                                ++_pktstart;                                              \
00458                                *_pktstart     = (UINT16)((__size >> 16) & 0xffff);       \
00459                           } else {                                                       \
00460                                *_pktstart = (UINT16)(bufpt.GetIndex() -                  \
00461                                                     _pktstart.GetIndex());               \
00462                           }                                                              \
00463                         }
00464 #endif
00465 
00466 /*
00467 **   Reserve a fixed length chunk of buffer which will be filled in
00468 **   later.  ptr will point to the start of this buffer. 
00469 */
00470                      
00471 #define Reserve(ptr, n)   ptr = bufpt; bufpt += (n);
00472 
00473 
00474 
00475 
00476 #endif