sis3300.cpp

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/*
    This software is Copyright by the Board of Trustees of Michigan
    State University (c) Copyright 2005.

    You may use this software under the terms of the GNU public license
    (GPL).  The terms of this license are described at:

     http://www.gnu.org/licenses/gpl.txt

     Author:
             Ron Fox
             NSCL
             Michigan State University
             East Lansing, MI 48824-1321
*/


//   Implementation of the SIS3300 readout class.
//   This software reads out the SIS 3300 flash adc .
//   See the doxygen html, or comments in the header for restrictions and
//   usage information.
//
//   Ron Fox
//   NSCL
//   Michigan State University
//   East Lansing, MI 48824-1321
//   mailto: fox@nscl.msu.edu
//
// Copyright (c) 2001 NSCL all rights reserved.
//
#include <config.h>
#ifdef HAVE_STD_NAMESPACE
using namespace std;            // Needed here for spectrodaq
#endif

#include <spectrodaq.h>
#include <sis3300.h>
#include <string>
#include <CVMEInterface.h>

#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include <unistd.h>
#include <sys/mman.h>
#include <stdio.h>


#include <Iostream.h>
#include <Iomanip.h>



const char* sDevice="/dev/vme32d32";
const unsigned long nDeviceSize = 0x383000;
const unsigned long K = 1024L;

// Bits in the control register: Each control has a set/unset bit (J/K flip
// flop control).

const unsigned long CRLedOn                    =        1;
const unsigned long CRUserOutputOn             =        2;
const unsigned long CREnableTriggerOutput      =        4;
const unsigned long CRInvertTriggerOutput      = 0x000010;
const unsigned long CRTriggerOnArmedAndStarted = 0x000020;
const unsigned long CRLedOff                   = 0x010000;
const unsigned long CRUserOutputOff            = 0x020000;
const unsigned long CREnableUserOutput         = 0x040000;
const unsigned long CRNormalTriggerOutput      = 0x100000;
const unsigned long CRTriggerOnArmed           = 0x200000;

// Bits in the status register:

const unsigned long SRLedStatus            =        1;
const unsigned long SRUserOutputState      =        2;
const unsigned long SRTriggerOutputState   =        4; 
const unsigned long SRTriggerIsInverted    = 0x000010;
const unsigned long SRTriggerCondition     = 0x000020; //1: armed and started
const unsigned long SRUserInputCondition   = 0x010000;
const unsigned long SRP2_TEST_IN           = 0x020000;
const unsigned long SRP2_RESET_IN          = 0x040000;
const unsigned long SRP2_SAMPLE_IN         = 0X080000;


// Bits in the data acquisition control register:
//
const unsigned long DAQSampleBank1On       = 0x00000001;
const unsigned long DAQSampleBank2On       = 0x00000002;
const unsigned long DAQEnableHiRARCM       = 0x00000008;
const unsigned long DAQAutostartOn         = 0x00000010;
const unsigned long DAQMultiEventOn        = 0x00000020;
const unsigned long DAQStopDelayOn         = 0x00000080;
const unsigned long DAQStartDelayOn        = 0x00000040;
const unsigned long DAQEnableLemoStartStop = 0x00000100;
const unsigned long DAQEnableP2StartStop   = 0x00000200;
const unsigned long DAQEnableGateMode      = 0x00000400;
const unsigned long DAQEnableRandomClock   = 0x00000800;
const unsigned long DAQClockSetMask        = 0x00007000;
const unsigned long DAQDisableHiRARCM      = 0x00080000;
const unsigned long DAQClockSetShiftCount  = 12;
const unsigned long DAQSampleBank1Off      = 0x00010000;
const unsigned long DAQBusyStatus          = 0x00010000;
const unsigned long DAQSampleBank2Off      = 0x00020000;
const unsigned long DAQAutostartOff        = 0x00100000;
const unsigned long DAQMultiEventOff       = 0x00200000;
const unsigned long DAQStopDelayOff        = 0x00800000;
const unsigned long DAQStartDelayOff       = 0x00400000;
const unsigned long DAQDisableLemoStartStop= 0x01000000;
const unsigned long DAQDisableP2StartStop  = 0x02000000;
const unsigned long DAQDisableGateMode     = 0x04000000;
const unsigned long DAQDisableRandomClock  = 0x08000000;
const unsigned long DAQClockClearMask      = 0x70000000;
const unsigned long DAQCLockClearShiftCount= 28;


// Bits and fields in the event configuration register.
//

const unsigned long ECFGPageSizeMask      = 7;
const unsigned long ECFGPageSizeShiftCount= 0;
const unsigned long ECFGWrapMask          = 8;
const unsigned long ECFGWrapShiftCount    = 3;
const unsigned long ECFGRandomClock       = (1 << 11);

// Bits and fields in the threshold register.
const unsigned long THRLt                 =0x8000;
const unsigned long THRChannelShift    = 16;

// Bits and fields in the event directory longs:
//

const unsigned long EDIREndEventMask(0x1ffff);
const unsigned long EDIRWrapFlag(0x80000);

// HiRA firmware is a pre-requisite to using the HiRA
// indpendent random clock mode.

const unsigned long HIRAFWMAJOR = 0x13;
const unsigned long HIRAFWMINOR = 0x05;


CSIS3300::CSIS3300(unsigned long nBaseAddress,
                   unsigned int           nCrate) :
  m_nBase(nBaseAddress),
  m_nFd(0),
  m_pCsrs(0),
  m_pEi1(0),
  m_pEi2(0),
  m_pEi3(0),
  m_pEi4(0),
  m_pModuleId(0),
  m_pCsr(0),
  m_pAcqReg(0),
  m_pResetKey(0),
  m_pStart(0),
  m_pEventConfig(0),
  m_pStartDelay(0),
  m_pStopDelay(0),
  m_pAddressReg1(0),
  m_pAddressReg2(0),
  m_pAddressReg3(0),
  m_pAddressReg4(0),
  m_pEventDirectory1(0),
  m_pEventDirectory2(0),
  m_pEventDirectory3(0),  
  m_pEventDirectory4(0),
  m_fStartDelayEnabled(false),
  m_nStartDelayClocks(0),
  m_fStopDelayEnabled(false),
  m_nStopDelayClocks(0),
  m_fGateMode(false),
  m_fRandomClock(false),
  m_fLemoStartStop(false),
  m_fP2StartStop(false),
  m_fHiRA_RCM(false),
  m_fStopTrigger(false),
  m_fPageWrap(false)
{
  m_eClock = Internal100Mhz;
  m_pBank1Buffers[0] = 0;  
  m_pBank1Buffers[1] = 0;  
  m_pBank1Buffers[2] = 0;  
  m_pBank1Buffers[3] = 0;

  m_pThresholds[0]   = 0;
  m_pThresholds[1]   = 0;
  m_pThresholds[2]   = 0;
  m_pThresholds[3]   = 0;

  for(int i = 0; i < 8; i++) {  // This threshold is never made.
    m_fThresholdLt[i] = true;
    m_nThresholds[i]  = 0;
  }


  //  Event config register:






  // Map to the base address in A32/D32 space.


  void *p = CVMEInterface::Open(CVMEInterface::A32, nCrate);
  m_nFd = p;
  m_pCsrs  = (volatile unsigned long*)CVMEInterface::Map(p, m_nBase, 
                                                          0x3000);

  

  // Calculate and store the pointers to the useful module registers.

  // CSR Block:

  m_pModuleId    = m_pCsrs + (4/sizeof(long));

  // If the module is not an SIS 3300 or 3301 according to the
  // module Id register throw a hissy fit:

  unsigned long id    = *m_pModuleId;
  unsigned long model = (id >> 16) & 0xffff;
  if ((model != 0x3300) && (model != 0x3301)) {
    CVMEInterface::Unmap(m_nFd, (void*)m_pCsrs, 0x3000);
    CVMEInterface::Close(m_nFd);
    char error[1024];
    sprintf(error, "CSIS3300: Module at %08x is not a 3300 nor a 3301\n",
            m_nBase);
    throw string(error);
  }
  

  m_pCsr         = m_pCsrs;
  m_pAcqReg      = m_pCsrs + (0x10/sizeof(long));
  m_pResetKey    = m_pCsrs + (0x20/sizeof(long));
  m_pStart       = m_pCsrs + (0x30/sizeof(long));
  m_pStop        = m_pCsrs + (0x34/sizeof(long));
  m_pStartDelay  = m_pCsrs + (0x14/sizeof(long));
  m_pStopDelay   = m_pCsrs + (0x18/sizeof(long));


  m_pEventConfig = (volatile unsigned long*)CVMEInterface::Map(m_nFd,
                                                    m_nBase + 0x100000, 0x10);


  //

  m_pEi1  = (volatile unsigned long*)CVMEInterface::Map(m_nFd, 
                                                        m_nBase + 0x200000, 
                                                        0x3000);

  m_pThresholds[0] = m_pEi1 + (4/sizeof(long));
  m_pAddressReg1    = m_pEi1 + (8/sizeof(long));
  m_pEventDirectory1= m_pEi1 + (0x1000/sizeof(long));

  m_pEi2 = (volatile unsigned long*)CVMEInterface::Map(m_nFd, 
                                                       m_nBase + 0x280000, 
                                                       0x3000);
  m_pThresholds[1] = m_pEi2 + (4/sizeof(long));
  m_pAddressReg2    = m_pEi2 + (8/sizeof(long));
  m_pEventDirectory2= m_pEi2 + (0x1000/sizeof(long));

  m_pEi3 = (volatile unsigned long*)CVMEInterface::Map(m_nFd, 
                                                       m_nBase + 0x300000, 
                                                       0x3000);
  m_pThresholds[2] = m_pEi3 + (4/sizeof(long));
  m_pAddressReg3    = m_pEi3 + (8/sizeof(long));
  m_pEventDirectory3= m_pEi3 + (0x1000/sizeof(long));
 
  m_pEi4 = (volatile unsigned long*)CVMEInterface::Map(m_nFd, 
                                                       m_nBase + 0x380000, 
                                                       0x3000);
  m_pThresholds[3] = m_pEi4 + (4/sizeof(long));
  m_pAddressReg4    = m_pEi4 + (8/sizeof(long));
  m_pEventDirectory4= m_pEi4 + (0x1000/sizeof(long));


  


  // Set module modes which should be done via internal functions to
  // ensure internal self consistency.

  SetSampleSize(Sample128K);

  
}

CSIS3300::~CSIS3300()
{
  CVMEInterface::Unmap(m_nFd, (void*)m_pCsrs, 0x3000);
  CVMEInterface::Unmap(m_nFd, (void*)m_pEventConfig, 0x10);
  CVMEInterface::Unmap(m_nFd, (void*)m_pEi1, 0x3000);
  CVMEInterface::Unmap(m_nFd, (void*)m_pEi2, 0x3000);
  CVMEInterface::Unmap(m_nFd, (void*)m_pEi3, 0x3000);
  CVMEInterface::Unmap(m_nFd, (void*)m_pEi4, 0x3000);
                      
  CVMEInterface::Close(m_nFd);
}
void
CSIS3300::SetClock(ClockSource eClock)
{
  m_eClock = eClock;
}
void
CSIS3300::SetStartDelay(bool Enable, unsigned int nClocks)
{
  m_fStartDelayEnabled = Enable;
  m_nStartDelayClocks  = nClocks;
}
void
CSIS3300::SetStopDelay(bool Enable, unsigned int nClocks)
{
  m_fStopDelayEnabled = Enable;
  m_nStopDelayClocks  = nClocks;
}
void
CSIS3300::GateMode(bool Enable)
{
  m_fGateMode = Enable;
}
void
CSIS3300::RandomClock(bool Enable)
{
  m_fRandomClock = Enable;
}
void
CSIS3300::LemoStartStop(bool Enable)
{
   m_fLemoStartStop = Enable;
}
void
CSIS3300::P2StartStop(bool Enable)
{
   m_fP2StartStop = Enable;
}
void
CSIS3300::HiRA_RCM(bool Enable)
{
  if((!haveHiRAFirmware()) && Enable) {    
    throw string("Attempting to use HiRA Random clock with non HiRA firmware");
  }
  else {
    m_fHiRA_RCM = Enable;
  }
}
void
CSIS3300::TriggerOnStop(bool Enable)
{
  m_fStopTrigger = Enable;
}
void
CSIS3300::SetSampleSize(SampleSize ePagesize)
{
  m_ePagesize = ePagesize;
  switch (m_ePagesize) {
  case Sample128K:
    m_nPagesize = 128*K;
    break;
  case Sample16K:
    m_nPagesize = 16*K;
    break;
  case Sample4K:
    m_nPagesize = 4*K;
    break;
  case Sample2K:
    m_nPagesize = 2*K;
    break;
  case Sample1K:
    m_nPagesize = K;
    break;
  case Sample512:
    m_nPagesize = 512;
    break;
  case Sample256:
    m_nPagesize = 256;
    break;
  case Sample128:
    m_nPagesize = 128;
    break;
  }
}

/********
void
CSIS3300::SetSampleSize(unsigned int ePagesize)
{
  m_ePagesize = ePagesize;
  if(m_ePagesize>128000) m_ePagesize = 128000;
  m_nPagesize = m_ePagesize;
}
*/

void
CSIS3300::EnableWrap(bool Enable)
{
  m_fPageWrap = Enable;
}

CSIS3300::ClockSource
CSIS3300::getCurrentClockSource()
{
  return m_eClock;
}
bool
CSIS3300::isStartDelayEnabled()
{
  return m_fStartDelayEnabled;
}
bool
CSIS3300::isStopDelayEnabled()
{
  return m_fStopDelayEnabled;
}
unsigned int
CSIS3300::getStartDelayClocks()
{
  return m_nStartDelayClocks;
}
unsigned int
CSIS3300::getStopDelayClocks()
{
  return m_nStopDelayClocks;
}
void
CSIS3300::SetThresholds(bool* pLessthan, unsigned int* pValues)
{
  for(int i = 0; i < 8; i++) {
    m_fThresholdLt[i] = *pLessthan++;
    m_nThresholds[i]  = (*pValues++) & 0x3fff;
  }
}

void
CSIS3300::InitDaq()
{

  *m_pResetKey = 0;             // Reset the module.

  // Set up the Status register pointed to by m_pCsr:
  //   LED off, Output is trigger. Trigger output is univerted.
  //   Trigger on armed if trigger is start, or armed and started if trigger
  //   is stop.
  unsigned csrmask = CRLedOff | CRUserOutputOff | CREnableTriggerOutput |
                     CRNormalTriggerOutput;
  if(m_fStopTrigger) {
    csrmask |= CRTriggerOnArmedAndStarted;
  }
  else {
    csrmask |= CRTriggerOnArmed;
  }
  *m_pCsr = csrmask;
  
  // Set up the Acquisition control register *m_pAcqReg according to:
  // Enable sample clock for bank 1, Enable multievent mode,
  // m_fStartDelayEnabled, m_fStopDelayEnabled, Front panel start/stop enabled.
  // P2 disabled, m_fGateMode, m_eClock  
  //  Note that the rest has turned all the bits off:
  // Note: Multievent mode is required for page size confinement e.g.
  // for post trigger modes and should be harmless for the start modes.
  
  *m_pAcqReg = 0xffff0000;
        //  csrmask = DAQEnableLemoStartStop |     DAQMultiEventOn;
  csrmask = 0;

  if(m_fStartDelayEnabled) {
    csrmask |= DAQStartDelayOn;
    *m_pStartDelay = m_nStartDelayClocks;
  }
  if(m_fStopDelayEnabled) {
    csrmask |= DAQStopDelayOn;
    *m_pStopDelay = m_nStopDelayClocks;
    
  }
  if(m_fGateMode) {
    csrmask |= DAQEnableGateMode;
  }
  if(m_fRandomClock) {
    csrmask |= DAQEnableRandomClock;
  }
  if(m_fLemoStartStop) {
    csrmask |= DAQEnableLemoStartStop;
  }
  if(m_fP2StartStop) {
    csrmask |= DAQEnableP2StartStop;
  }

  /* Added by M. Famiano  to Enable the HiRA RCM */


  csrmask |= (m_eClock << DAQClockSetShiftCount) ;



  if(m_fHiRA_RCM) {
    csrmask |= DAQEnableHiRARCM;
  }
  /************************************************/

  *m_pAcqReg = csrmask;


  // Configure the global event configuration register.
  // We set the event size in this register from m_ePagesize and
  // we set the wrap bit from m_fPageWrap
  //
  csrmask = m_ePagesize << ECFGPageSizeShiftCount;
  if(m_fPageWrap) csrmask |= ECFGWrapMask;
  if(m_fRandomClock) csrmask |= ECFGRandomClock;

    
  *m_pEventConfig = csrmask;

  // Configure the channel thresholds.
  
  int tchan = 0;
  for(int i =0; i < 4; i++) {
    unsigned long eventhresh = m_nThresholds[tchan];
    if(m_fThresholdLt[tchan]) eventhresh |= THRLt;
    tchan++;
    unsigned long oddthresh = m_nThresholds[tchan];
    if(m_fThresholdLt[tchan]) oddthresh |= THRLt;
    tchan++;

    *(m_pThresholds[i]) = (oddthresh << THRChannelShift) | eventhresh;
  }
  
  // Enable sampling into bank1.
  
  *m_pAcqReg = DAQSampleBank1On;        // Arm sampling into bank1.
}

/*The following functions added by Mike Famiano */

void
CSIS3300::LightOn()
{
  *m_pCsrs = 0x1;
}
void
CSIS3300::LightOff()
{
  *m_pCsrs = 0x10000;
}

void
CSIS3300::EnableUserOut()
{
  *m_pCsrs = 0x2;
}

void
CSIS3300::DisableUserOut()
{
  *m_pCsrs = 0x4;
}

void
CSIS3300::StrobeUserOut(int time)
{
 *m_pCsrs = 0x2;
 usleep(time);
 *m_pCsrs = 0;
}

unsigned int
CSIS3300::GetUserInput()
{
  return (*m_pCsrs&SRUserInputCondition)>>16;
}

void
CSIS3300::StartSampling()
{
  *m_pStart = 0;
}

void
CSIS3300::StopSampling()
{
  *m_pStop = 0;
}


/*The Previous functions added by Mike Famiano */

bool
CSIS3300::WaitUntilDone(int timeout)
{
  int i;
  for(i = 0; i < timeout; i ++) {
    if(((*m_pAcqReg) & DAQBusyStatus) == 0) break;
  }

  if(i >= timeout) return false;

  unsigned long  last = *m_pAddressReg1;
  while(last != *m_pAddressReg1) 
    last = *m_pAddressReg1;             // Wait for address reg. to stabilize.

  *m_pAcqReg = DAQSampleBank1Off | DAQSampleBank2Off ; // Disable sampling

  return true;

}
unsigned long
CSIS3300::EventNumber(int bank)
{
  unsigned long last;
  if(bank==1)last = *m_pAddressReg1;
  else if(bank==2)last = *m_pAddressReg2;
  else if(bank==3)last = *m_pAddressReg3;
  else last = *m_pAddressReg4;

  return last;
}

void 
CSIS3300::ClearDaq()
{

  *m_pAcqReg = DAQSampleBank1On; // Enable bank1.
}
void 
CSIS3300::DisArm1()
{

  *m_pAcqReg = DAQSampleBank1Off; // Enable bank2.
}
void 
CSIS3300::DisArm2()
{

  *m_pAcqReg = DAQSampleBank2Off; // Enable bank1.
}
void 
CSIS3300::Arm1()
{

  *m_pAcqReg = DAQSampleBank1On; // Enable bank1.
}
void 
CSIS3300::Arm2()
{

  *m_pAcqReg = DAQSampleBank2On; // Enable bank1.
}
unsigned int 
CSIS3300::ReadAGroup(void* pbuffer,
                          volatile unsigned long* pAddressReg,
                          unsigned long           nBase)
{

  unsigned long nPagesize(m_nPagesize); // Max conversion count.

  // Decode the event directory entry:

  unsigned long    AddressRegister = *pAddressReg;
  bool           fWrapped      = (*pAddressReg & EDIRWrapFlag ) != 0;
  unsigned long  nEventEnd     = (*pAddressReg & EDIREndEventMask);
  nEventEnd                   &= (nPagesize-1); // Wrap the pointer to pagesize
  unsigned long  nLongs(0);
  unsigned long* Samples((unsigned long*)pbuffer);

  // The three cases above break into two cases: fWrapped true or not.

  if(fWrapped) {
    //  Full set of samples... 

    nLongs = nPagesize;
    
    // Breaks down into two reads:

    // The first read is from nEventEnd -> nPagesize.

    int nReadSize = (nPagesize - nEventEnd);
    if(nReadSize > 0) {
      CVMEInterface::Read((void*)m_nFd,
                          nBase + nEventEnd*sizeof(long),
                          Samples,
                          nReadSize*sizeof(long));
    }

    // The second read, if necessary, is from 0 ->nEventEnd-1.
    
    unsigned long nOffset =  nReadSize; // Offset into Samples where data goes.
    nReadSize = nPagesize - nReadSize;  // Size of remaining read.
    if(nReadSize > 0) {
      CVMEInterface::Read((void*)m_nFd,
                          nBase,
                          &(Samples[nOffset]),
                          nReadSize*sizeof(long));
    }
    nLongs = nPagesize;
  }
  else {                        
    // Only 0 - nEventEnd to read...
    if(nEventEnd > 0) {
      CVMEInterface::Read((void*)m_nFd,
                          nBase, Samples, 
                          (nEventEnd*sizeof(long)));
      nLongs = nEventEnd;
    } 
    else {                      // nothing to read...
      nLongs = 0;
    }
  }

  return nLongs*sizeof(unsigned long)/sizeof(unsigned short);

}

unsigned int
CSIS3300:: ReadAGroup(DAQWordBufferPtr& pBuffer,
                          volatile unsigned long* pAddressReg,
                          unsigned long  nBase)
{

  unsigned long nPagesize(m_nPagesize); // Max conversion count.
  unsigned long Samples[nPagesize];

  unsigned int nWords = ReadAGroup(Samples,
                                   pAddressReg,
                                   nBase);

  // The data are now read into the first nLongs of Sample.
  // Now copy them into the data buffer:

  if(nWords > 0) {
#ifdef CLIENT_HAS_POINTER_COPYIN
    pBuffer.CopyIn((unsigned short*)Samples, 0,  nWords);
    pBuffer += nWords;
#else
    unsigned short* pSrc = (unsigned short*)Samples;
    for(int i =0; i < nWords; i++) {
      *pBuffer = *pSrc++;
      ++pBuffer;
    }
#endif
  }
  return nWords;

}

unsigned int
CSIS3300::ReadAllGroups(DAQWordBufferPtr& pBuffer)
{
  int nRead(0);

  nRead += ReadGroup1(pBuffer);
  nRead += ReadGroup2(pBuffer);
  nRead += ReadGroup3(pBuffer);
  nRead += ReadGroup4(pBuffer);

  return nRead;
}
// With ordinary buffers:

unsigned int
CSIS3300::ReadAllGroups(void* pBuff)
{
  int nRead(0);
  int nSegSize;

  unsigned short *pBuffer;

  nSegSize = ReadGroup1(pBuffer);
  pBuffer += nSegSize;
  nRead   += nSegSize;
  nSegSize = ReadGroup2(pBuffer);
  pBuffer += nSegSize;
  nRead   += nSegSize;
  nSegSize = ReadGroup3(pBuffer);
  pBuffer += nSegSize;
  nRead   += nSegSize;
  nSegSize = ReadGroup4(pBuffer);
  pBuffer += nSegSize;
  nRead   += nSegSize;

  return nRead;
}

unsigned int
CSIS3300::ReadGroup1(DAQWordBufferPtr& pBuffer)
{

  unsigned long endaddress = *m_pAddressReg1; // For debugging.
  return ReadAGroup(pBuffer, m_pEventDirectory1, m_nBase + 0x400000);
}
// Now with ordinary buffers:

unsigned int
CSIS3300::ReadGroup1(void* pBuffer)
{
  unsigned long endaddress = *m_pAddressReg1;
  return ReadAGroup(pBuffer, m_pEventDirectory1, m_nBase + 0x400000);
}
unsigned int
CSIS3300::ReadGroup2(DAQWordBufferPtr& pBuffer)
{
  unsigned long endaddress = *m_pAddressReg1; // For debugging.
  return ReadAGroup(pBuffer, m_pEventDirectory2, m_nBase + 0x480000);
}
// Now with ordinary buffers:

unsigned int
CSIS3300::ReadGroup2(void* pBuffer)
{
  unsigned long endaddress = *m_pAddressReg1;
  return ReadAGroup(pBuffer, m_pEventDirectory2, m_nBase+0x480000);

}
unsigned int
CSIS3300::ReadGroup3(DAQWordBufferPtr& pBuffer)
{
  unsigned long endaddress = *m_pAddressReg1; // For debugging.
  return ReadAGroup(pBuffer, m_pEventDirectory3, m_nBase + 0x500000);
}
// Now with ordinary buffers:

unsigned int 
CSIS3300::ReadGroup3(void* pBuffer)
{
  unsigned long endaddress = *m_pAddressReg1; // For debugging.
  return ReadAGroup(pBuffer, m_pEventDirectory3, m_nBase + 0x500000);
}

unsigned int
CSIS3300::ReadGroup4(DAQWordBufferPtr& pBuffer)
{
  unsigned long endaddress = *m_pAddressReg1; // For debugging.
  return ReadAGroup(pBuffer, m_pEventDirectory4, m_nBase + 0x580000 );
}
// With ordinary buffers:

unsigned int
CSIS3300::ReadGroup4(void* pBuffer)
{
  unsigned long endaddress = *m_pAddressReg1; // For debugging.
  return ReadAGroup(pBuffer, m_pEventDirectory4, m_nBase + 0x580000 );
}


void 
CSIS3300::Reset()
{
  *m_pResetKey = 0;
}
bool
CSIS3300::haveHiRAFirmware() const
{

  // Read the module firmware..


  unsigned int major = getFirmwareMajor();
  unsigned int minor = getFirmwareMinor();

  return ((HIRAFWMAJOR == major));

}

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