v1729a create name ?option value...?
v1729a config name option value?..?
v1729a cget name ?option?
This configuration command provides support for the CAEN V1729A digitizer. The module operates by continunously storing waveforms in a circular analog memory. Triggering criteria then determine and which chunks of this analog memory are digitized. Note that while the analog memory suports extremely fast sampling (GHz), the digitization and readout are slow by comparison. Therefore support integrates a delay operation that can allow the MVLC to stall the stack for some fixed period of time before initiating readout. Be sure to see the V1729 Manual for guidance in setting this delay.
I believe this module is no longer in production. As such it is not recommended for new applications. Existing applications should look for a replacement module.
-base vme-adressDefines the base address configured in the module's rotary switches. This value is used by the support software to construct references to the module's internal registers and event memory.
-irqenable enabled | disabledEnables or disables modcule interrupts. This defaults to disabled and should probably not be enabled.
-threshold DAC-value
Value to load into the trigger thresholds DAC. Note that this value is only
used when -triggersource is either internal
or both. IF used, you might want to think about triggering
your stack using the module's trigger output signal.
Legal values are 0 - 4095 where the default is 4095. The actual threshold DAC
values will be (0.5*DAC-value-1)mV Allowing for thresholds in the range
of ±1V
-pretrigger clocksSets the pretrigger value. This is in the range 0-0xffff and defaults to 10240. The pretrigger is in units of clocks. See section 2.1.1 of V1729 Manual
-posttrigger samplesSets the posttrigger value in clocks. This value must be inthe range of 0-0xffff and defaults to 64. Together, the pretrigger and post trigger define the acquisition window and, therefore, the number of samples to expect from the module.
-triggersource external | internal| both
Determines the source of the module's trigger. The default is external
which uses the front panel EXT_TRG input. internal triggers
on the input waveforms exceeding the -threshold value.
Note that in that case you may want to use the TRIGOUT front panel signal to know
externally that the module has triggered. both will trigger the
module on either the front panel EXT_TRG signal or a channel crossing the threshold
value.
-triggeredge rising | fallingDetermines the edge of the trigger that is used to determine how the internal trigger opertates. In rising mode (the default), the module triggers when an input rises above the threshold. If falling, the module triggers when an input falls below the threshold. This supports both negative and positive going pulses. Note that the external trigger always fires on the transition from not asserted to asserted. The manual is unclear on this point in that it says the external trigger is always on the rising edge, but since the input uses NIM signalling, this really means falling edge to asserted.
-triggermask enabled | disabled
This allows the -triggerchannels to define which channels
actually participate in the internal trigger. If enabled,
then -triggerchannels defines which channels participate in the trigger.
THe default is disabled which allows all channels to participate in the
internal trigger.
-triggerchannels mask
If -triggermask is enabled only the channels
whose bits are set in the mask will participate in the internal trigger.
Channel 0 is the least significatn bit and channel 4, the most, so a value of
0x5 allows channels 0, and 2 to participate in the trigger.
By default this mask is 0xf allowing all channels to participate in the internal trigger.
-poststoplatency time
See section 2.1.5 of the
V1729 Manual.
If the module is internally triggered, it still requires an external validation
signal in the EXT_TRG signal. If this validation does not come before
the poststoplatency after the end of the window (set by the
-posttrigger), the saved signal is not digitized; saving a tremendous
amount of dead-time. The time values are in units of 2.5μsec. By default this is
4 which represents 10μsec.
-postlatencypretrig time
Sets the latency to wait prior to re-enabling the trigger if trigger validation was
not received in time. This timer starts with the end of the
-poststoplatency timer. The time is in units of 2.5μsec and defaults
to 1. The minimum value is the time required to fill the analog memory which is,
in fact 2.5μsec at 1GHz sampling. Note that 2 should be used if you are sampling at
500MHz.
-samplingfreq 2ghz | 1ghz | 500mhzSets the sampling frequency for the analog memory.
-delay microsecondsSince a significant time is required to digitize the window of acquired data, this parameter allows the MVLC to delay by the number of microseconds specified by the parameter before attempting readout. Default value is 0 but should not remain that small. THe manual does not give guidance on the delay time to use. See DATA READ below.
The first word read af the the delay is the Interrupt register which indicates if data can be read yet. The TRIGGER_REC register is also read and then the entire RAM as the VMUSB cannot be told how to read only the waveform. See the V1729 Manual for a description of how to find the acquired waveform in the RAM image that is read after the TRIGER_REC register.
To adjust the delay, take data and increase it until the Interrupt register value indicates reliably that data is available by having its bottom bit set. That bit indicates that waveform data is read to be read.