tdc1x90 create name ?option value...?
tdc1x90 config name option value?..?
tdc1x90 cget name ?option?
The CAEN V1290 and V1190 (collectively V1x90) are time digitizers that are based on the CERN HPTDC chip. This module is still available, however my understanding is that the CERN HPTDC chip is not so once stocks of that chip run out, this module will no longer be available.
THe module is normally used in FRIB in trigger matching mmode. In trigger matching mode, the trigger and programmable parameters define a window and hits within that window constitute an event.
Note that the trigger gated relative to the digitizer's onboard clock and, therefore its timing is not known to anywhere close to the precision of the digitizers. If timing relative to the trigger is desired, the gate itself must be digitized and differences computed with respect to the digitized gate. This is normally used when the matching window is used to simulate either a common start or a common stop TDC.
Note that the module is controlled by a micro controller and parameters are set by passing them to the microcontroller via data and handshake registers. The MVLC can properly do this handshake so it may well initialize faster than the VMUSB, but, in general, it can take quite a bit of time to initialize these modules.
This module has a lot of configuration options so be sure to familiarize yourself with the manuals for the specific TDC you are using. For example, see the CAEN V1190 manual.
-base vme-addressThe module base address. Be sure to set this option to match the base address selecte by the module rotary switches.
-vsn virtual-slotThis is a 5 bit value that will be included as the GEO field in the data read from the module. See figure 6.1 of the CAEN V1190 manual.
THe value of -vsn should be unique over all modules.
IF you set this to be the number of the VME Bus slot the module is inserted
in, it will be hard to go wrong.
-ipl IRQ-priorityIf you are using the module to generate backplane interrupts, this is the number of the interrupt request line (and hence the interrupt priority level) to use. A value of 0 disables interrupts and is the default. If you are using interrupts, the value can be in the range 1-6.
-vector status-id
If -ipl is not zero, this provides the 8 bit value of the
status id that is placed on the data bus in response to an IACK recdeived by the
module. Note that if the interrupt handler supports 16 bit interrupters,
you will probably need to program it to accept interrtupt at this
status-id with the top 8 bits of the status-id set to 1.
-termination none | on | switchControls the termination of the control bus ECL inputs. By default this is on making the board suitable for the final board in a bus. If none the inputs are not terminated. If switch the TERM switch on the board controls the termination not software.
-tagtime enabled | disabledEnables or disables the trigger time tag word to be included in the data. Note that this has a resolution of the module's clock and does not remove the possible need for a reference channel.
-highwatermark wordsWhen interrupts are enabled on the module, if the event buffer contains more than this number of words the module initiates an interrupt. This defaults to 1 and must be in the range 0-0xffff
-ecloutput ready | full | almostfull | error
Defines the meanin go f the OUT_PROG ECL output on the
control bus. The default, ready, means that the signal is
asserted when data are ready to be read. full means asserted
when the event memory is completely full. almostfulll
means the signal is asserted when the event memory has
at least the -highwatermark option value words.
-window widthSets the time width of the matching window in 25ns units. Be sure to understand the constraints on the trigger, matching window and window offset described in 2.4.1 of the CAEN V1190 manual.
-offset offset-timeSets the window offset relative to the trigger. This value is in units of 25ns. The values are in the range -2048 to 40. The relation of the trigger, window and offset must satisfy the constraints described in 2.4.1 of the CAEN V1190 manual. Note that the offset is in the same timing domain as the trigger and, therefore the window will jitter by 25ns from the absolute trigger time.
-extramargin margin-tiomeSets the extra margin time in the matching window. This value is in clock cycles. The default is 8. which represents 200ns. The purpose of this parameter is to slightly extend the matching window to compensate for the jitter in the start of the matching window due to the fact that it is started by the FPGA.
-rejectmargin reject-margin-timThe reject margin is a time at the beginning of the match window during which hits will be rejectec. Again this is intended to compensate for the jitter in gate timing which results in a corresponding jitter in the start of the matching window. Units are in clock cycles, and the default is 4 which represents 100ns.
-triggerrelative true | falseIf true, the default, hit timing will be relative to the trigger. Note that this does not eliminate the need for a reference channel to get true trigger relative timing, as the trigger timing will jitter by as much as a clock cycle.
-edgedetect pair | leading | trailing | bothDeterrmines when a hit is timed. THe default is leading which times on the leading edge of the input. trailing times on the trailing edge of the input pulse and both makes both edges of the input pulse a hit. In pair a pulse will produce a hit containing the leading edge timing of the pulse and another hit containing the pulse width.
-edgeresolution 800ps | 200ps | 400ps | 800ps | 1.6ns |3.12ns Sets the meaning of the least significant bit of timing data for edge triggering. The default is 100ps
-leresolution 100ps 200ps 400ps 800ps 1.6ns 3.12nsIf the module is in pair mode, sets the resolution of the leading edge hit. By default, this is 100ps
-widthresolution 100ps | 200ps | 400ps | 800ps | 1.6ns | 3.2ns | 6.25ns |12.5ns |25ns |50ns |100ns |200ns | 400ns | 800ns If the mnodule is in pair mode, sets the resolution of the width hit. By default this is 100ps
-deadtime 5ns | 10ns | 30ns | 100ns |Sets the time between pulses that a channel will be dead before accepting a second pulse. By default, this is 5ns
-encapsulatechip enabled | disabledDetermines if a chip header/trailer for each HPTDC chip in the module will be produced. Default is enabled
-maxhits 0 | 1 | 2 | 4 | 8 | 16 | 32 | 64 | 128 | infinite
Limits the number of hits that can be put into an event. The default,
infinite places no limit on the event size. If the number of hits actually
exceeds the -maxhits value, the TDC generates an Error word at the end of
the event with error flag value of 0x1000 indicating size limit exceeded.
-errormark enabled | disabledIf enabled (the default), the TDC is allowed to indicate a global error by placing an error flag at the end of the event.
-errorbypass enabled | disabledIf enabled, the default, the TDC is bypassed in the event of an eror.
-globaloffset coarse fineAllows for an offset to be added to all channels. A coarse and fine offset are provided. This defaults to two zero values, which provides no offset.
-channeladjusts off0 ...Provides for a list of offsets to add to the hit timing of each channnel. By default, this is an empty string which supplies no offsets. Valid values are a list of offset values for channel0, channel 1 etc...
-model v1190A | v1190B | v1290A | v1290N With the VMUSB, the model number could be read from the modue, however with the translaotr this is not possible. Therefore, set this option to the correct model number of your module. The model number defines the number of channels and a few other bits of programminug that are module dependent. the default value is v1190A
The VMUSB Readout configuration of this module also provided configuration parameters that help VMUSBSpecTcl to automatically decode data from these devices and togenerate the correct spectra. The MVLC SpecTcl will process these configuration options as well:
-refchannnel channel-noProvides the number of the channel to be used as the reerence channel. This channel should have the gate plugged into it. Data from each channel will have the value of the reference channel subtracted from it to get an absolute gate relative timing.
-depth hit-countAs each channel can have more than one hit, this defines the number of single hit spectra SpecTcl will create for each channel. Defaults to 16.
-channelcount num-channels
Required parameter (not legal default) this option defines the number of channels
the module has. This is normally, 128, 64, 32, or 16 depending on the
model number. In the future, this may be doublechecked or elimnated in favor
of computing this from the -model option.